Toshiba Achieves 40 Percent Power Reduction in Latest MeP SoC With Synopsys Galaxy Design Platform
Galaxy Platform's Multi-Voltage Flow Enables Toshiba to Realize Power-Efficient Design
MOUNTAIN VIEW, Calif., Jan. 24 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, announced that Toshiba Corporation has achieved a 40 percent power reduction on its latest 90 nanometer (nm) Media embedded Processor (MeP) system-on-chip (SoC) design using the Synopsys Galaxy(TM) Design Platform. The Galaxy platform's multi-voltage flow enabled Toshiba to realize an innovative power management architecture that balances power performance at the module level, making it well suited for mobile applications.
"Toshiba developed a module-wise dynamic-voltage and frequency scaling architecture for its MeP SoC that targets low power applications," said Takashi Yoshimori, technology executive SoC Design, Toshiba Corporation Semiconductor Company. "We implemented this architecture using the Galaxy platform's multi-voltage flow on our SoCs for mobile application design and achieved a 40 percent power savings for the module in which the technology is applied. We are now in the process of testing this Galaxy-based flow as a standard part of our low power design methodology."
Toshiba will present the new architecture and design results at the EDS Fair in Yokohama, Japan on January 27 and 28.
Synopsys Galaxy Design Platform offers a customer-proven solution for power management and power integrity. The Galaxy platform delivers power optimization with support for clock-gating, multi-voltage designs, multi-threshold leakage, state retention power gating and power network synthesis. The full complement of capabilities in the Galaxy platform gives designers a predictable, 90-nm-proven design flow that speeds timing, area and power convergence, enabling rapid design closure.
"We continue to collaborate with Toshiba on a variety of design methodologies and are enthusiastic about Toshiba's latest achievement with the Galaxy platform," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. "Toshiba's success with the low power design flow for its MeP SoCs demonstrates how the Galaxy platform continues to enable market leaders to speed design convergence and bring innovations quickly to market."
About Synopsys
Synopsys, Inc. is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .
NOTE: Synopsys is a registered trademark of Synopsys, Inc., and Galaxy is a trademark of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
CONTACT: Nancy Renzullo of Synopsys, Inc., +1-650-584-1669, or
renzullo@synopsys.com; or Sarah Seifert of Edelman Public Relations,
+1-650-429-2776, or Sarah.seifert@edelman.com, for Synopsys, Inc.
Web site: http://www.synopsys.com/
|
